The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2026

Filed:

Dec. 17, 2020
Applicant:

Lam Research Corporation, Fremont, CA (US);

Inventors:

Ravi Vellanki, San Jose, CA (US);

Eric H. Lenz, Livermore, CA (US);

Yu Pan, San Jose, CA (US);

Assignee:

Lam Research Corporation, Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10P 72/78 (2026.01); B23C 3/28 (2006.01); C23C 16/06 (2006.01); C23C 16/455 (2006.01); C23C 16/458 (2006.01); H10P 72/76 (2026.01);
U.S. Cl.
CPC ...
H10P 72/78 (2026.01); B23C 3/28 (2013.01); C23C 16/06 (2013.01); C23C 16/45565 (2013.01); C23C 16/4583 (2013.01); H10P 72/7616 (2026.01);
Abstract

Chucks for supporting semiconductor wafers during certain processing operations are disclosed. The chucks may include a recessed region near the outer perimeter of the wafer that has one or more surfaces that face towards the wafer but are recessed therefrom so as to not contact the wafer around the perimeter of the wafer. The use of such a recessed region prevents direct thermally conductive contact between the chuck and the wafer, thereby allowing the wafer to achieve a more uniform temperature distribution in certain process conditions. This has the further effect of causing certain processing operations to be more uniform with respect to edge-center deposition (or etch) layer thickness.


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