The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2026
Filed:
Jul. 08, 2022
Intel Corporation, Santa Clara, CA (US);
Isaac Abraham, Tacoma, WA (US);
Michael W. Altmann, Folsom, CA (US);
Jonathan Kolet Gamble, McMinnville, OR (US);
Rodolfo Kiyama Armendariz, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Data transfer rates input to and output from electronic devices are a function of I/O pad circuit structure. The load capacitance of an I/O pad may reduce the bandwidth of an I/O circuit. A reduced pad capacitance circuit may be used to reduce or eliminate the positive and physical pad capacitance associated with a capacitive pad. This negative capacitance reduces or minimizes poor signal quality arising from large pad capacitance. This improved signal may be fed into a comparator, where the signal may be improved further using an equalizer. The use of negative capacitance circuit will increase the transmit and receive signaling quality of I/O interfaces.