The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2026

Filed:

Jun. 05, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Cheng Yu Huang, Hsinchu, TW;

Wei-Chieh Chiang, Yuanlin Township, TW;

Keng-Yu Chou, Kaohsiung City, TW;

Tzu-Hsuan Hsu, Kaohsiung City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10F 39/00 (2025.01);
U.S. Cl.
CPC ...
H10F 39/807 (2025.01); H10F 39/011 (2025.01); H10F 39/8027 (2025.01); H10F 39/8037 (2025.01); H10F 39/8053 (2025.01); H10F 39/8063 (2025.01);
Abstract

The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a substrate having a first side and a second side opposing the first side. The substrate has one or more sidewalls defining a trench extending along opposing sides of a pixel region having a first width. An isolation structure including one or more dielectric materials is disposed within the trench. The isolation structure has a second width. An image sensing element and a focal region are disposed within the pixel region. The focal region is configured to receive incident radiation along the second side of the substrate. A ratio of the second width to the first width is in a range of between approximately 0.1 and approximately 0.2, so that the focal region is completely confined between interior sidewall of the isolation structure facing the image sensing element.


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