Power-efficient monitoring for usage-based-disturbance mitigation

Abstract

Apparatuses and techniques are described implementing power-efficient monitoring for usage-based-disturbance mitigation. In a first aspect, a memory device takes a less strict approach for monitoring worse-case conditions associated with usage-based disturbance. In particular, the memory device conserves power by foregoing updating a list of rows associated with worse-case conditions until an unlisted row has a substantially worse condition than any one of the listed rows. This decreases how often the memory device expends power to update the list. In an optional second aspect, the memory device performs a partial bit-width comparison operation to evaluate the 'substantially worse' criterion. The partial bit-width comparison enables a comparator to be implemented with a smaller footprint and operate with less power as compared to a comparator that is capable of performing a full bit-width comparison operation.