The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2026

Filed:

Jul. 19, 2024
Applicant:

Globalfoundries U.s. Inc., Malta, NY (US);

Inventors:

Siva Kumar Chinthu, Bangalore, IN;

Suresh Pasupula, Bangalore, IN;

Devesh Dwivedi, Bangalore, IN;

Assignee:

GlobalFoundries U.S. Inc., Malta, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018521 (2013.01);
Abstract

A negative voltage level shifter. A circuit is provided that includes a first input path that couples an input node to a gate of a first n-type metal-oxide semiconductor (NMOS) transistor, wherein the first NMOS transistor has a drain coupled to a zero volt supply and a source coupled to a gate of a second NMOS transistor, wherein the second NMOS transistor incudes a source coupled to a negative power supply of −V volts and a drain coupled to an output node; and a second input path that couples the input node to a gate of a third NMOS transistor via an inverter, wherein the third NMOS transistor has a drain coupled to the zero volt supply and a source coupled to the output node.


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