The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2026

Filed:

Aug. 06, 2020
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Poorna Kale, Folsom, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06N 3/08 (2023.01); G06F 3/06 (2006.01); G06F 13/16 (2006.01); G06F 15/16 (2006.01); G06N 3/04 (2023.01); H10W 90/00 (2026.01); H10W 90/20 (2026.01);
U.S. Cl.
CPC ...
G06N 3/08 (2013.01); G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G06F 13/1668 (2013.01); G06F 15/16 (2013.01); G06N 3/04 (2013.01); H10W 90/00 (2026.01); H10W 90/291 (2026.01); H10W 90/297 (2026.01);
Abstract

Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. For example, an integrated circuit device may be configured to execute instructions with matrix operands and configured with random access memory. The random access memory is configured to store a plurality of inputs from a plurality of sensors respective, parameters of an Artificial Neural Network, and instructions executable by the Deep Learning Accelerator to perform matrix computation to generate outputs of the Artificial Neural Network, including first outputs generated using the sensors separately and a second output generated using a combination of the sensors.


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