The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2026

Filed:

Jun. 06, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Manho Lee, Suwon-si, KR;

Jungmin Seo, Suwon-si, KR;

Kwangseob Shin, Suwon-si, KR;

Woosin Choi, Suwon-si, KR;

Junghwan Choi, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2023.01); H01L 23/00 (2006.01); H10B 80/00 (2023.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); H01L 24/49 (2013.01); H10B 80/00 (2023.02); H01L 2224/49052 (2013.01); H01L 2224/49096 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06562 (2013.01);
Abstract

A buffer chip is wire-bonded to memory dies. A semiconductor package includes a semiconductor die stack, a first set of wire bonds connected to a first set of semiconductor dies, a second set of wire bonds connected to a second set of semiconductor dies, and the buffer chip. The second set of semiconductor dies are on the first set of semiconductor dies. The buffer chip includes a first set of die bond pads being close to the semiconductor die stack, and a second set of die bond pads being distant from the semiconductor die stack. The second set of wire bonds extends to the first set of die bond pads of the buffer chip, and the first set of wire bonds extends to the second set of die bond pads of the buffer chip.


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