The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2026

Filed:

Sep. 28, 2023
Applicant:

Winbond Electronics Corp., Taichung City, TW;

Inventors:

Cheng-Hsiang Liu, Taichung City, TW;

Kao-Tsair Tsai, Taichung City, TW;

Assignee:

WINBOND ELECTRONICS CORP., Taichung City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/762 (2006.01); H01L 21/308 (2006.01); H01L 21/3105 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76224 (2013.01); H01L 21/3086 (2013.01); H01L 21/31053 (2013.01);
Abstract

A method for reducing wafer edge defects is provided. The method includes providing a wafer with a central region and an edge region, forming a hard mask layer on the wafer, forming a spacer pattern on the hard mask layer, forming a photoresist layer covering the spacer pattern, performing a wafer edge treatment process on the photoresist layer to form an annular photoresist pattern, using the annular photoresist pattern as an etching mask, and sequentially transferring the exposed spacer pattern to the hard mask layer and the wafer to form a plurality of trenches in the wafer.


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