The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2026

Filed:

Apr. 12, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Wei Ting Hsieh, Hsinchu, TW;

Kuen-Yi Chen, Hsinchu City, TW;

Yu-Wei Ting, Taipei City, TW;

Yi Ching Ong, Hsinchu, TW;

Kuo-Ching Huang, Hsinchu City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/405 (2006.01); G11C 11/4091 (2006.01); G11C 11/4096 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
G11C 11/405 (2013.01); G11C 11/4091 (2013.01); G11C 11/4096 (2013.01); H10B 12/00 (2023.02);
Abstract

A gain cell memory includes a write transistor located on a substrate; a read transistor located on the substrate; a capacitor having a first electrode, a node dielectric, and a second electrode, wherein the first electrode is electrically connected to a first source/drain region of the write transistor and to a gate electrode of the read transistor; and a peripheral circuit configured to electrically bias a source region of the read transistor at a normal source bias voltage while the gain cell memory device is not under a read operation, and at a current-boost source bias voltage that increases an on-current of the read transistor while the gain cell memory device is under the read operation.


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