The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2026

Filed:

Dec. 13, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Susanne M. Balle, Hudson, NH (US);

Duane E. Galbi, Wayland, MA (US);

Andrzej Kuriata, Gdansk, PL;

Sundar Nadathur, Cupertino, CA (US);

Nagabhushan Chitlur, Portland, OR (US);

Francesc Guim Bernat, Barcelona, ES;

Alexander Bachmutsky, Sunnyvale, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/78 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 15/7889 (2013.01); G06F 9/5044 (2013.01); G06F 2209/5019 (2013.01); G06F 2209/509 (2013.01);
Abstract

Methods, apparatus, and software and for hardware microservices accelerated in other processing units (XPUs). The apparatus may be a platform including a System on Chip (SOC) and an XPU, such as a Field Programmable Gate Array (FPGA). The FPGA is configured to implement one or more Hardware (HW) accelerator functions associated with HW microservices. Execution of microservices is split between a software front-end that executes on the SOC and a hardware backend comprising the HW accelerator functions. The software front-end offloads a portion of a microservice and/or associated workload to the HW microservice backend implemented by the accelerator functions. An XPU or FPGA proxy is used to provide the microservice front-ends with shared access to HW accelerator functions, and schedules/multiplexes access to the HW accelerator functions using, e.g., telemetry data generated by the microservice front-ends and/or the HW accelerator functions. The platform may be an infrastructure processing unit (IPU) configured to accelerate infrastructure operations.


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