The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2026

Filed:

Jun. 30, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Ellis Nease, New Tripoli, PA (US);

Giacomo Cascio, Villach, AT;

Marc Jan Georges Tiebout, Finkenstein, AT;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10W 44/20 (2026.01); H01Q 1/22 (2006.01); H10W 70/05 (2026.01); H10W 70/65 (2026.01); H10W 70/685 (2026.01);
U.S. Cl.
CPC ...
H10W 44/20 (2026.01); H01Q 1/2283 (2013.01); H10W 70/05 (2026.01); H10W 70/095 (2026.01); H10W 70/65 (2026.01); H10W 70/685 (2026.01); H10W 44/212 (2026.01); H10W 44/216 (2026.01); H10W 44/223 (2026.01); H10W 44/234 (2026.01); H10W 44/248 (2026.01); H10W 44/255 (2026.01);
Abstract

A semiconductor package is provided. The semiconductor package includes a semiconductor die arranged within a housing of the semiconductor package. The semiconductor die holds a radio frequency circuit and a plurality of first electrical contacts. Additionally, the semiconductor package includes a plurality of second electrical contacts formed on the exterior of the housing to enable external electrical contacting of the semiconductor package. The semiconductor package further includes a plurality of transmission lines formed in or on a substrate of the semiconductor package. Each of the plurality of transmission lines couples a respective one of the plurality of first electrical contacts with a respective one of the plurality of second electrical contacts. At least one of the plurality of transmission lines is formed as a stepped transmission line transformer comprising a plurality of transmission line segments exhibiting different impedances to match a respective first impedance of the respectively coupled first electrical contact to a respective second impedance at the respectively coupled second electrical contact. The plurality of transmission line segments exhibit different spacings to one or more ground plane of the semiconductor package.


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