Stacked fet structures with different gate dielectric compositions or thicknesses

Abstract

Bonded stacked FETs with individually tunable gate dielectrics are provided. In one aspect, a stacked FET device includes: a bottom transistor disposed on a wafer; and a top transistor bonded on top of the bottom transistor via a bonding layer, where the bottom transistor includes a stack of first active layers, a first gate dielectric disposed on the first active layers, and a first gate electrode disposed on the first gate dielectric, where the top transistor includes a stack of second active layers, a second gate dielectric disposed on the second active layers, and a second gate electrode disposed on the second gate dielectric, and where the first gate dielectric has at least one of a different composition and a different thickness from the second gate dielectric. A method of forming the present stacked FET devices is also provided.