The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2026

Filed:

Nov. 30, 2023
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Makoto Kitagawa, Folsom, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0635 (2013.01); G06F 3/0604 (2013.01); G06F 3/0679 (2013.01);
Abstract

A memory device may include various circuitry including multiple memory banks and a circuit under array. The circuit under array may include a number of control blocks each coupling to a respective memory bank. The control blocks may route data and commands to the memory cells of the memory arrays of the respective memory banks. In particular, the control blocks may include routing circuitry including column routing circuits, row routing circuits, and coupling routing circuits to route data between external devices and the memory banks. For example, the coupling routing circuits may couple the column routing circuits and the row routing circuits. Implementing the coupling routing circuits with the control blocks may reduce a footprint of the circuit under array.


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