The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2026

Filed:

Mar. 27, 2023
Applicant:

Cisco Technology, Inc., San Jose, CA (US);

Inventors:

Wenbin MA, Shanghai, CN;

Yuqing Zhu, Shanghai, CN;

Weiying Ding, Shanghai, CN;

Mingtong Zuo, Shanghai, CN;

Mike Sapozhnikov, San Jose, CA (US);

Srinath Penugonda, Milpitas, CA (US);

David Nozadze, San Jose, CA (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H10W 70/65 (2026.01); H10W 72/20 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 70/65 (2026.01); H10W 72/248 (2026.01); H10W 72/252 (2026.01); H10W 90/724 (2026.01);
Abstract

A printed circuit board includes a grid of pads and tracks. The grid of pads includes a first pair of adjacent signal pads arranged in a first column and a second pair of adjacent signal pads arranged in a first row. A first signal pad of the second pair is arranged in the first column. The grid of pads also includes a third pair of adjacent signal pads arranged in a second row. A second signal pad of the first pair is arranged in the second row. The grid of pads further includes a fourth pair of adjacent signal pads arranged in a second column. A third signal pad of the third pair is arranged in the second column. A fourth signal pad of the fourth pair is arranged in the first row. The tracks are electrically coupled to the first, second, third, and fourth pairs.


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