The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2026

Filed:

Oct. 26, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Se Woung Oh, Suwon-si, KR;

Hyung Dong Kim, Suwon-si, KR;

Sang Mo Koo, Suwon-si, KR;

Han Sung Kim, Suwon-si, KR;

Young Dae Cho, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 64/23 (2025.01);
U.S. Cl.
CPC ...
H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 64/01 (2025.01); H10D 64/015 (2025.01); H10D 64/017 (2025.01); H10D 64/018 (2025.01); H10D 64/021 (2025.01); H10D 64/254 (2025.01);
Abstract

A method for fabricating a semiconductor device includes forming an active pattern on a substrate, forming sacrificial and semiconductor layers alternately stacked on the active pattern, forming a dummy gate and first source/drain trench on one side of the dummy gate by etching the stacked structure, forming a second source/drain trench on the active pattern by etching a sidewall of the sacrificial layer exposed to the first source/drain trench, forming a first inner spacer material layer along sidewall and bottom surfaces of the second source/drain trench, forming a second inner spacer material layer by anisotropic etching a first inner spacer material layer, and forming a third source/drain trench on the active pattern by isotropic etching.


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Oh, Se. (2026). Method for fabricating semiconductor device (U.S. Patent No. 12635157). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12635157

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