Adaptive current generation circuit and method applied to input buffer of high-speed adc

Abstract

An adaptive current generation circuit includes an inverter drive chain, a frequency divider, a frequency detector, a low-pass filter, a static comparator group, and a controllable current mirror. An input analog signal of the input buffer is converted into a frequency discrimination voltage in a direct current form sequentially through conversion of the inverter drive chain, frequency division of the frequency divider, frequency detection of the frequency detector, and conversion of the low-pass filter. Then the static comparator group performs a plurality of times of comparison to obtain N bits of digital codes. Finally, the controllable current mirror is controlled by using the N bits of digital codes. The controllable current mirror provides a magnitude-adjustable input current for the input buffer under control of the N bits of digital codes. A magnitude of the input current is positively correlated with a frequency of the input analog signal.