The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 2026
Filed:
Apr. 05, 2024
Cadence Design Systems, Inc., San Jose, CA (US);
Vipul Jain, West Bengal, IN;
Vinod Kumar, Uttar Pradesh, IN;
Hajee Mohammed Shuaeb Fazeel, Bengaluru, IN;
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
The present disclosure describes a dynamic switching circuit that may include an interface that may be configured to receive a variable external signal. The dynamic switching circuit may include a maximum voltage circuit that may be operatively connected to the interface. The maximum voltage circuit may include a first PMOS switch and a first NMOS switch and may provide a maximum signal configured to place the first PMOS switch into an off-state and to place the first NMOS switch into an on-state. The maximum voltage circuit may also include a minimum voltage circuit that may be operatively connected to the interface. The minimum voltage circuit may include a second PMOS switch and a second NMOS switch and may provide a minimum signal configured to place the second NMOS switch into an off-state and to place the second PMOS switch into an on-state.