The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2026

Filed:

Dec. 28, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Horace H. Lau, Mountain View, CA (US);

Prashant Arora, Fremont, CA (US);

Olivia K. Wu, Los Altos, CA (US);

Tony L. Werner, Los Altos, CA (US);

Carey K. Kloss, Los Altos, CA (US);

Amir Khosrowshahi, San Diego, CA (US);

Andrew Yang, Cupertino, CA (US);

Aravind Kalaiah, San Jose, CA (US);

Vijay Anand R. Korthikanti, Milpitas, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06N 3/063 (2023.01); G06F 17/16 (2006.01); G06N 3/04 (2023.01); G06N 3/08 (2023.01);
U.S. Cl.
CPC ...
G06N 3/063 (2013.01); G06F 17/16 (2013.01); G06N 3/04 (2013.01); G06N 3/08 (2013.01);
Abstract

A network of matrix processing units (MPUs) is provided on a device, where each MPU is connected to at least one other MPU in the network, and each MPU is to perform matrix multiplication operations. Computer memory stores tensor data and a master control central processing unit (MCC) is provided on the device to receive an instruction from a host device, where the instruction includes one or more tensor operands based on the tensor data. The MCC invokes a set of operations on one or more of the MPUs based on the instruction, where the set of operations includes operations on the tensor operands. A result is generated from the set of operations, the result embodied as a tensor value.


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