The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 2026
Filed:
Jun. 08, 2021
Intel Corporation, Santa Clara, CA (US);
Deepak Samuel Kirubakaran, Hillsboro, OR (US);
William A. Braun, Beaverton, OR (US);
Rajshree A. Chabukswar, Sunnyvale, CA (US);
Leigh Davies, Staffordshire, GB;
Russell J. Fenger, Beaverton, OR (US);
Alexander Gendler, Kiriat Motzkin, IL;
Raoul V. Rivas Toledano, Hillsboro, OR (US);
Eliezer Weissmann, Haifa, IL;
Intel Corporation, Santa Clara, CA (US);
Abstract
Dynamic interrupt steering remaps the handling of interrupts away from processor units executing important workloads. During the operation of a computing system, important workload utilization rates for processor units handling interrupts are determined and those processor units with utilization rates about a threshold value are made unavailable for handling interrupts. Interrupts are dynamically remapped to processor units available for interrupt handling based on processor unit idle state and, in the case of heterogeneous computing systems, processor unit type. Processor units are capable of idle state demotion by, in response to receiving a request to enter into a deep idle state, determining if its interrupt handling rate is greater than a threshold value, and if so, placing itself into a shallower idle state than requested. This avoids the computing system from incurring the expensive idle state exit latency and power costs associated with exiting from a deep idle state.