The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2026

Filed:

Jun. 27, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Jiamin Wang, Hsinchu, TW;

Blanka Magyari-Kope, Hsinchu, TW;

Chris Liu, Hsinchu, TW;

Ashwathi Iyer, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/69 (2025.01); H01L 21/02 (2006.01); H10B 51/30 (2023.01); H10D 30/67 (2025.01); H10D 64/01 (2025.01); H10D 64/68 (2025.01); H10D 99/00 (2025.01);
U.S. Cl.
CPC ...
H10D 30/701 (2025.01); H01L 21/02565 (2013.01); H10B 51/30 (2023.02); H10D 30/6713 (2025.01); H10D 30/6739 (2025.01); H10D 30/6755 (2025.01); H10D 64/033 (2025.01); H10D 64/689 (2025.01); H10D 99/00 (2025.01);
Abstract

A semiconductor structure includes, from bottom to top or from top to bottom, a gate electrode, a ferroelectric dielectric layer, a metal-rich metal oxide layer, a dielectric metal nitride layer, and a metal oxide semiconductor layer. A ferroelectric field effect transistor may be provided by forming a source region and a drain region on the metal oxide semiconductor layer. The metal-rich metal oxide layer and the dielectric metal nitride layer homogenize and stabilize the interface between the ferroelectric dielectric layer and the metal oxide semiconductor layer, and reduce excess oxygen atoms at the interface, thereby improving switching characteristics of the ferroelectric field effect transistor.


Find Patent Forward Citations

Wang, Jiamin. (2026). Interfacial dual passivation layer for a ferroelectric device and methods of forming the same (U.S. Patent No. 12628382). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12628382

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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