The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2026

Filed:

Nov. 26, 2021
Applicant:

Iucf-hyu (Industry University Cooperation Foundation Hanyang University), Seoul, KR;

Inventor:

Yun Heub Song, Seoul, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); H10B 41/27 (2023.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
G11C 16/0483 (2013.01); H10B 41/27 (2023.02); H10D 64/035 (2025.01); H10D 64/037 (2025.01);
Abstract

A three-dimensional flash memory including floating devices and a manufacturing method therefor are disclosed. A method for manufacturing a three-dimensional flash memory according to an embodiment may comprise the steps of: preparing a semiconductor structure including a plurality of word lines and a plurality of interlayer insulating layers, which are alternately stacked in a vertical direction while extending in a horizontal direction, respectively, and at least one memory cell string formed extending through the plurality of word lines and the plurality of interlayer insulating layers in the vertical direction, wherein the at least one memory cell string constitutes a plurality of memory cells corresponding to the plurality of word lines, while including a channel layer formed extending in the vertical direction, a charge storage layer formed to surround the channel layer, and a floating device layer formed extending to surround the charge storage layer; removing the plurality of interlayer insulating layers from the semiconductor structure; and removing regions of the floating device layer corresponding to the plurality of interlayer insulating layers, in order to form a plurality of floating devices isolated from each other.


Find Patent Forward Citations

Song, Yun. (2026). Three-dimensional flash memory including floating devices, and manufacturing method therefor (U.S. Patent No. 12626763). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12626763

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