The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 2026
Filed:
Jul. 09, 2024
Samsung Electronics Co., Ltd., Suwon-si, KR;
Sanghoon Jung, Suwon-si, KR;
Yeongwoo Kang, Suwon-si, KR;
Chulkwon Park, Suwon-si, KR;
Jeongdon Ihm, Suwon-si, KR;
Changsik Yoo, Suwon-si, KR;
Keonwoo Park, Suwon-si, KR;
Youngseok Park, Suwon-si, KR;
Hyunchul Yoon, Suwon-si, KR;
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;
Abstract
A memory core circuit includes a memory cell array including sub cell arrays and a core control circuit including sub peripheral circuits under the sub cell arrays. The sub peripheral circuits are divided into first and second column edge regions and a central region. The central region is between the first column edge region and the second column edge region. A sense amplifier region including a plurality of bitline sense amplifiers are disposed in at least one of the first column edge region and the second column edge region. A wordline driver region including a plurality of sub wordline drivers is disposed in the central region. At least a portion of device peripheral circuits configured to control the memory core circuit is disposed in a rest region other than the sense amplifier region and the wordline driver region.