The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2026

Filed:

Jun. 02, 2022
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Wei-Chen Wang, Taipei City, TW;

Han-Wen Hu, Tainan City, TW;

Yung-Chun Li, New Taipei City, TW;

Huai-Mu Wang, New Taipei City, TW;

Chien-Chung Ho, Chiayi County, TW;

Yuan-Hao Chang, Taipei City, TW;

Tei-Wei Kuo, Taipei City, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 7/544 (2006.01); G06F 9/30 (2018.01); G06N 3/063 (2023.01); G06N 20/00 (2019.01); G11C 7/10 (2006.01); G11C 11/54 (2006.01); G11C 11/56 (2006.01);
U.S. Cl.
CPC ...
G06F 7/5443 (2013.01); G06F 9/3001 (2013.01); G06F 9/30036 (2013.01); G06N 3/063 (2013.01); G06N 20/00 (2019.01); G11C 7/1006 (2013.01); G11C 11/54 (2013.01); G11C 11/5642 (2013.01); Y02D 10/00 (2018.01);
Abstract

A memory device, includes a memory array for storing a plurality of vector data each of which has an MSB vector and a LSB vector. The memory array includes a plurality of memory units each of which has a first bit and a second bit. The first bit is used to store the MSB vector of each vector data, the second bit is used to store the LSB vector of each vector data. Each vector data is executed with a multiplying-operation, the MSB vector and the LSB vector of each vector data is executed with a first group-counting operation and a second group-counting operation respectively. The threshold voltage distribution of each memory unit is divided into N states, where N is a positive integer and N is less than 2 to the power of 2, the effective bit number stored by each memory unit is less than 2.


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