The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2026

Filed:

Dec. 28, 2023
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Vuk Lesi, Cornelius, OR (US);

Shabbir Ahmed, Beaverton, OR (US);

Christopher Gutierrez, Hillsboro, OR (US);

Marcio Rogerio Juliato, Portland, OR (US);

Manoj R. Sastry, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/10 (2006.01); G06F 1/12 (2006.01);
U.S. Cl.
CPC ...
G06F 1/12 (2013.01); G06F 1/10 (2013.01);
Abstract

Various systems and methods for evaluating time synchronization values provided from a clock leader are discussed. An example method performed by a clock follower device includes: obtaining a timestamp from a time synchronization protocol that provides synchronized time values from a clock leader; determining, based on the timestamp, a measured time drift value that represents a time drift of a hardware clock, with the time drift observed relative to the clock leader; determining an estimated time drift value that models a time drift of the hardware clock, modeled from one or more environmental conditions experienced by the hardware clock; comparing the measured time drift value with the estimated time drift value; and adjusting a clock of the device based on the timestamp, in response to validating that the measured time drift value is within a statistically expected range corresponding to the estimated time drift value.


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