The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2026

Filed:

May. 02, 2024
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Seohee Kim, San Diego, CA (US);

Chulmin Jung, San Diego, CA (US);

Xiao Chen, San Diego, CA (US);

Yi-Ju Chen, Toufen, TW;

Hanil Lee, San Diego, CA (US);

Subbarao Palacharla, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01); G11C 11/413 (2006.01);
U.S. Cl.
CPC ...
G11C 5/147 (2013.01); G11C 11/413 (2013.01);
Abstract

A memory is provided that includes an analog gate voltage driver that drives the gate of a head switch transistor for a bitcell array with an analog gate voltage while the bitcell array operates in a light-sleep mode. The analog gate voltage switches the head switch transistor partially on so that the head switch transistor passes a reduced power supply voltage despite being powered by a memory power supply voltage that is greater than the reduced power supply voltage. The reduced power supply voltage has a sufficient magnitude so that the bitcell array retains its stored binary contents during the light-sleep mode.


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