The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2026

Filed:

Oct. 31, 2023
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Ruilong Xie, Niskayuna, NY (US);

Kisik Choi, Watervliet, NY (US);

Tenko Yamashita, Schenectady, NY (US);

Dechao Guo, Niskayuna, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 84/85 (2025.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2026.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01);
U.S. Cl.
CPC ...
H10D 84/852 (2025.01); H10D 62/121 (2025.01); H10D 62/151 (2025.01); H10D 64/017 (2025.01); H10D 84/0128 (2025.01); H10D 84/013 (2025.01); H10D 84/0135 (2025.01); H10D 84/038 (2025.01); H10D 84/83 (2025.01);
Abstract

Embodiments of present invention provide a semiconductor structure. The semiconductor structure includes a dielectric bar having a left sidewall and a right sidewall; a first nanosheet transistor having a first set of channel nanosheets in direct contact with the left sidewall of the dielectric bar; and a second nanosheet transistor having a second set of channel nanosheets in direct contact with the right sidewall of the dielectric bar, where a first portion of the dielectric bar between the first and the second set of channel nanosheets has a first height; a second portion of the dielectric bar between a first source/drain region of the first nanosheet transistor and a second source/drain region of the second nanosheet transistor has a second height; and the first height is higher than the second height. A method of forming the same is also provided.


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