Balanced subdivision of circuits for hardware emulation assisted simulation

Abstract

Disclosed are techniques for simulation of a circuit design using a set of primary signals captured by a hardware emulation system. In preparation for simulation, the circuit design is divided into partitions that are substantially uniform in size. Sequential dependencies are then identified based on signals that cross partitions. The set of primary signals includes signals that, when provided as input to the simulation, break the sequential dependencies such that each partition can be simulated independently. Techniques for determining which signals to include in the set of primary signals are also disclosed. The hardware emulation system is configured to capture values of the primary signals as part of emulating the circuit design. Afterwards, the simulation is performed using the captured values. During the simulation, non-primary signals are reconstructed using values obtained from simulating each partition independently.