The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 28, 2026
Filed:
May. 27, 2022
Intel Corporation, Santa Clara, CA (US);
David Cowperthwaite, Portland, OR (US);
Kenneth Daxer, Sunnyvale, CA (US);
Aditya Navale, Folsom, CA (US);
Prasoonkumar Surti, Folsom, CA (US);
Arthur Hunter, Cameron Park, CA (US);
Hema Chand Nalluri, Bengaluru, IN;
Jeffery S. Boles, Folsom, CA (US);
Vasanth Ranganathan, El Dorado Hills, CA (US);
Joydeep Ray, Folsom, CA (US);
David Puffer, Tempe, AZ (US);
Aravindh Anantaraman, Folsom, CA (US);
Ankur Shah, Folsom, CA (US);
Vidhya Krishnan, Folsom, CA (US);
Kritika Bala, Folsom, CA (US);
Michael Apodaca, El Dorado Hills, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Described herein is a partitional graphics processor having multiple hard partitions with separate software execution and fault domains. One embodiment provides a graphics processor comprising a system interface and a plurality of graphics processing resources coupled with the system interface. The plurality of graphics processing resources is configurable to be partitioned into a plurality of isolated device partitions, each isolated device partition configured for fault isolation and independent concurrent execution of workloads associated with a plurality of clients, and the system interface is configured to present each of the plurality of isolated device partitions as a virtual function.