The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2026

Filed:

Aug. 04, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Ji-Hoon Choi, Seongnam-si, KR;

Sangmin Kang, Hwaseong-si, KR;

Siyeong Yang, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 43/27 (2023.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 41/40 (2023.01); H10B 43/10 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 41/40 (2023.02); H10B 43/10 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02);
Abstract

A semiconductor memory device is disclosed. The device may include an electrode structure including electrodes, the electrodes stacked on a substrate, a source semiconductor layer between the substrate and the electrode structure, and a vertical channel structure penetrating the electrode structure. The vertical channel structure includes a vertical insulating pattern, a vertical semiconductor pattern spaced apart from the electrode structure with the vertical insulating pattern interposed between the vertical semiconductor pattern and the electrode structure; and a barrier pattern spaced apart from the electrode structure with the vertical semiconductor pattern interposed between the barrier pattern and the electrode structure. The vertical semiconductor pattern comprises a recess region, the source semiconductor layer extending in the recess region. The barrier pattern includes an insulating layer including carbon.


Find Patent Forward Citations

Loading…