The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2026
Filed:
Apr. 14, 2023
Applicant:
Silicon Storage Technology, Inc., San Jose, CA (US);
Inventors:
Hieu Van Tran, San Jose, CA (US);
Thuan Vu, San Jose, CA (US);
Kha Nguyen, Ho Chi Minh, VN;
Stephen Trinh, San Jose, CA (US);
Stanley Hong, San Jose, CA (US);
Hien Pham, Ho Chi Minh, VN;
Assignee:
Silicon Storage Technology, Inc., San Jose, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G11C 11/54 (2006.01); G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0619 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G11C 11/54 (2013.01); G11C 29/70 (2013.01);
Abstract
Numerous examples are disclosed of systems and methods to implement redundancy. In one example, a system comprises an array of non-volatile memory cells; a redundant array of non-volatile memory cells; and an input block coupled to respective rows in the array and respective rows in the redundant array and comprising row tag registers and redundant row tag registers.