The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2026
Filed:
Jun. 21, 2023
Samsung Electronics Co., Ltd., Suwon-si, KR;
Seokhyun Lee, Suwon-si, KR;
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;
Abstract
A semiconductor package includes: a lower redistribution wiring layer having: a first chip mounting region; a peripheral region, and lower redistribution wirings; a logic semiconductor chip mounted in the first chip mounting region, the logic semiconductor chip having a plurality of first through electrodes that are electrically connected to at least some of the lower redistribution wirings; a first sealing member covering the logic semiconductor chip, a plurality of conductive connectors penetrating the first sealing member in the peripheral region; an upper redistribution wiring layer provided on the first seal and having upper redistribution wirings that are electrically connected to the plurality of conductive connectors, the upper redistribution wiring layer having at least one second chip mounting region that overlaps at least a portion of the first chip mounting region; and at least one memory semiconductor chip mounted in the second chip mounting region using first and second conductive bumps.