Semiconductor device having side spacer patterns

Abstract

A semiconductor device includes source/drain regions formed over a substrate, and channel patterns and gate structures formed between the source/drain regions in a horizontal direction. The channel patterns are arranged to be spaced apart from each other over a surface of the substrate in a vertical direction. The gate structures are disposed between the channel patterns in the vertical direction. The gate structures include the following: side spacer patterns formed adjacent to the source/drain regions in the first horizontal direction, interfacial insulating layers formed over upper and lower surfaces of the channel patterns, gate insulating layers over surfaces of the side spacer patterns and surfaces of the interfacial insulating layers, and gate electrodes over the gate insulating layers. The side spacer patterns include germanium (Ge).