The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2026

Filed:

Sep. 10, 2024
Applicant:

Shaoxing Yuanfang Semiconductor Co., Ltd., Shaoxing, CN;

Inventors:

Venkata Kalyan Kumar Kota, Bangalore, IN;

Augusto Manuel Marques, Norwich, GB;

Rakesh Kumar Gupta, Bangalore, IN;

Raja Prabhu J, Bangalore, IN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/197 (2006.01); H03M 1/74 (2006.01); H03M 3/00 (2006.01); H04L 7/033 (2006.01);
U.S. Cl.
CPC ...
H03L 7/1976 (2013.01); H03M 1/745 (2013.01); H03M 3/358 (2013.01); H03M 3/50 (2013.01); H04L 7/0331 (2013.01);
Abstract

A digital-to-time converter (DTC) of a fractional-n PLL contains a delay generator and a current-drawing block. The current drawn by the delay generator from the power supply contains: (A) a fixed component having a first current magnitude regardless of magnitude of a second code specifying the desired delay; and (B) a variable component having a magnitude determined only by magnitude of the second code. The current-drawing block draws correction-current from the power supply, whose magnitude is determined only by a complement of the second code.


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