The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2026

Filed:

Apr. 02, 2024
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Sudipta Sarkar, San Jose, CA (US);

Angus Mclaren, Dundas, CA;

Meenakshi S., Bengaluru, IN;

Priya T K, Bangalore, IN;

Srivatsa Ranganatha, Bangalore, IN;

Mohammed Ranjbar, San Jose, CA (US);

Paul Lee, San Francisco, CA (US);

Shwetabh Verma, Los Altos, CA (US);

George Chung Fai Ng, Markham, CA;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/099 (2006.01); H03L 7/089 (2006.01); H03L 7/091 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0992 (2013.01); H03L 7/0891 (2013.01); H03L 7/091 (2013.01); H03L 2207/50 (2013.01);
Abstract

Embodiments included herein are directed towards a subranging digital to time converter-based fractional phase locked loop circuit. The circuit may include a digital to time converter and a phase detector circuit configured to receive a reference frequency and an output of the digital to time converter. The circuit may further include a phase frequency detector/charge pump circuit configured to receive the reference frequency and the output of the digital to time converter. The circuit may also include a loop filter and voltage-controlled oscillator circuit configured to receive an output of the phase frequency detector/charge pump circuit. The circuit may further include a divider circuit configured to receive an output of the voltage-controlled oscillator circuit and to transmit a signal to the digital to time converter.


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