The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2026

Filed:

Aug. 31, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Jaeil Kim, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/409 (2006.01); G06F 11/10 (2006.01); G11C 11/408 (2006.01);
U.S. Cl.
CPC ...
G11C 11/409 (2013.01); G06F 11/1044 (2013.01); G11C 11/4085 (2013.01);
Abstract

A memory device comprises memory and control circuitry. The control circuitry can receive a command to access the memory. Responsive to receiving the command to access the memory, the control circuitry can provide command data of the command to pipe latch circuitry and error correction code (ECC) circuitry. The memory device further includes pipe latch circuitry to receive command data of the command from the control circuitry and maintain the command data for a period of time of a duration longer than error calculation time of the ECC circuitry.


Find Patent Forward Citations

Kim, Jaeil. (2026). Parallel pipe latch for memory access operations (U.S. Patent No. 12603122). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12603122

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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