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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12598930 B1

PDFFull Text
Date of Patent:
Apr. 07, 2026

Filed:

Jul. 21, 2021

Conformal thermal cvd with controlled film properties and high deposition rate

Applicant:

Lam Research Corporation, Fremont, CA (US);

Inventors:

Awnish Gupta, Hillsboro, OR (US);

Bart J. Van Schravendijk, Palo Alto, CA (US);

Frank Loren Pasquale, Tigard, OR (US);

Adrien Lavoie, Newberg, OR (US);

Jason Alexander Varnell, Tigard, OR (US);

Praneeth Ramasagaram, Boise, ID (US);

Joseph R. Abel, West Linn, OR (US);

Jennifer Leigh Petraglia, Lake Oswego, OR (US);

Dustin Zachary Austin, Tigard, OR (US);

Assignee:

Lam Research Corporation, Fremont, CA (US);

Attorney:

Weaver Austin Villeneuve & Sampson LLP

Primary Examiner:

Joseph A Miller, Jr

Int. Cl.
CPC ...
H01L 21/311 (2006.01); C23C 16/04 (2006.01); C23C 16/06 (2006.01); C23C 16/34 (2006.01); C23C 16/40 (2006.01); C23C 16/56 (2006.01); H01J 37/32 (2006.01); H01L 21/02 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 21/31116 (2013.01); C23C 16/045 (2013.01); C23C 16/06 (2013.01); C23C 16/345 (2013.01); C23C 16/401 (2013.01); C23C 16/56 (2013.01); H01J 37/32449 (2013.01); H01J 37/32724 (2013.01); H01J 37/32816 (2013.01); H01L 21/02164 (2013.01); H01L 21/0217 (2013.01); H01L 21/0228 (2013.01); H01L 21/76831 (2013.01); H01L 21/76837 (2013.01); H01L 23/5283 (2013.01); H01L 23/53266 (2013.01);
Abstract

Methods and apparatuses for depositing dielectric films into features on semiconductor substrates are described herein. Methods involve depositing dielectric films by using controlled thermal chemical vapor deposition, with periodic passivation operations and densification to modulate film properties.

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