The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2026
Filed:
Apr. 12, 2021
Kla Corporation, Milpitas, CA (US);
Yiting Zhang, Fremont, CA (US);
Ankur A. Agarwal, Newark, CA (US);
KLA Corporation, Milpitas, CA (US);
Abstract
A method for accelerating physical simulation models during microelectronic device fabrication may include, but is not limited to, running a physical simulation model at a first grid size having a first resolution, generating outputs at the first grid size having the first resolution from the physical simulation model, inputting the outputs at the first grid size having the first resolution from the physical simulation model into a resolution enhancement model (REM), and generating outputs at a second grid size having a second resolution via the REM to reduce at least one of a computational time cost or a computational resource cost of a controller running the physical simulation model. The physical simulation model may simulate an on-wafer performance of at least one microelectronics fabrication process. The second grid size may be smaller than the first grid size. The second resolution may be higher than the first resolution.