The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2026

Filed:

Jun. 29, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Sagar C. Pawar, Karnataka, IN;

Pannerkumar Rajagopal, Karnataka, IN;

Raghavendra Nagaraj, Karnataka, IN;

Ovais F. Pir, Srinagar, IN;

Prakash Pillai, Karnataka, IN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/3296 (2019.01); G06F 1/30 (2006.01); G06F 1/3203 (2019.01); G06F 1/3234 (2019.01); G06F 1/324 (2019.01); G06F 9/4401 (2018.01); G06F 9/48 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3296 (2013.01); G06F 1/30 (2013.01); G06F 1/3203 (2013.01); G06F 1/3234 (2013.01); G06F 1/324 (2013.01); G06F 9/4418 (2013.01); G06F 9/4812 (2013.01);
Abstract

In an embodiment, a processor may include processing circuits to execute instructions. The processor may also include at least one circuit to: detect a management mode trigger event during operation of the processor in a first power state, the management mode trigger event to initiate a management mode in the processor; in response to a detection of the management mode trigger event, switch the processor from the first power state to a second power state; and after a switch of the processor from the first power state to the second power state, initiate the management mode in the processor. Other embodiments are described and claimed.


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