The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

May. 13, 2022
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chih-Chia Hu, Taipei, TW;

Yu-Hsiung Wang, Zhubei City, TW;

Ming-Fa Chen, Taichung City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 24/08 (2013.01); H01L 21/76807 (2013.01); H01L 21/76816 (2013.01); H01L 21/7684 (2013.01); H01L 21/76898 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/80 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 2224/02313 (2013.01); H01L 2224/02331 (2013.01); H01L 2224/02372 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/0362 (2013.01); H01L 2224/03622 (2013.01); H01L 2224/05006 (2013.01); H01L 2224/05008 (2013.01); H01L 2224/05082 (2013.01); H01L 2224/05546 (2013.01); H01L 2224/05573 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/08237 (2013.01); H01L 2224/211 (2013.01); H01L 2224/214 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01);
Abstract

An embodiment is a method including forming a first interconnect structure over a first substrate, forming a redistribution via over the first interconnect structure, the redistribution via being electrically coupled to at least one of the metallization patterns of the first interconnect structure, forming a redistribution pad over the redistribution via, the redistribution pad being electrically coupled to the redistribution via, forming a first dielectric layer over the redistribution pad, and forming a second dielectric layer over the first dielectric layer. The method also includes patterning the first and second dielectric layers, forming a bond via over the redistribution pad and in the first dielectric layer, the bonding via being electrically coupled to the redistribution pad, the bond via overlapping the redistribution via, and forming a first bond pad over the bonding via and in the second dielectric layer, the first bond pad being electrically coupled to the bond via.


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