The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

May. 09, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Yong-Sheng Huang, Hsinchu City, TW;

Hung-Shu Huang, Taichung City, TW;

Jhih-Bin Chen, Hsinchu, TW;

Chung-Huai Chang, Taichung City, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 62/10 (2025.01); H01L 21/762 (2006.01); H10D 30/60 (2025.01);
U.S. Cl.
CPC ...
H10D 62/115 (2025.01); H01L 21/76224 (2013.01); H10D 30/60 (2025.01);
Abstract

A semiconductor structure includes a first, second and third isolations. The first isolation and a second isolation are disposed in a substrate and substantially parallel to each other, wherein a portion of the substrate is disposed between the first isolation and the second isolations. The third isolation is disposed over the portion of the substrate between the first and second isolations. A top surface of the third isolation is substantially aligned with top surfaces of the first and second isolations. A first step is between a bottom surface of the third isolation and a bottom surface of the first isolation. A second step between the bottom surface of the third isolation and a bottom surface of the second isolation. A method for manufacturing a semiconductor structure is also provided.


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