The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

Oct. 03, 2023
Applicant:

Stmicroelectronics International N.v., Geneva, CH;

Inventors:

Sandro Rossi, Pavia, IT;

Alessandro Saccà, Milan, IT;

Niccolò Brambilla, San Donato Milanese, IT;

Valeria Bottarel, Novara, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/08 (2006.01); H02M 3/157 (2006.01); H02M 3/158 (2006.01); H03K 17/687 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H02M 1/08 (2013.01); H02M 3/157 (2013.01); H02M 3/158 (2013.01); H03K 17/6871 (2013.01); H03K 19/20 (2013.01);
Abstract

According to an embodiment, a bootstrap drive circuit for driving a bootstrap switch in a DC-DC converter is proposed. The bootstrap drive circuit includes a non-overlapping circuit, a first and a second capacitor, and a first and a second n-channel transistor. The non-overlapping circuit is configured to receive an input signal, the input signal being a function of a pulse width modulated (PWM) signal, wherein the input signal and the PWM signal are characterized by a first logic level, generate a first control signal from the input signal at a first output terminal of the non-overlapping circuit, the first control signal having the first logic level, and generate a second control signal from the input signal at a second output terminal of the non-overlapping circuit, the second control signal being characterized by a second logic level different from the first logic level.


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