logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12586644 B1

PDFFull Text
Date of Patent:
Mar. 24, 2026

Filed:

Nov. 21, 2023

Three-dimensional memory device including crack-resistant backside passivation structure and methods of forming the same

Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Kota Funayama, Yokkaichi, JP;

Masayuki Hiroi, Yokkaichi, JP;

Yu Saito, Yokkaichi, JP;

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:

THE MARBURY LAW GROUP PLLC

Primary Examiner:

David C Spalla

Int. Cl.
CPC ...
G11C 16/04 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 41/40 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01); H10W 20/42 (2026.01); H10W 20/41 (2026.01);
U.S. Cl.
CPC ...
G11C 16/0483 (2013.01); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 41/40 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02); H10W 20/42 (2026.01); H10W 20/435 (2026.01);
Abstract

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, a three-dimensional array of memory elements embedded in the alternating stack, a dielectric material portion located adjacent to the alternating stack, connection via structures vertically extending through the dielectric material portion, a backside connection pad cavity vertically extending through the source layer, a backside isolation layer, and a backside connection pad structure including a proximal portion contacting end surfaces of the connection via structures. The backside connection pad structure includes a tapered connecting portion overlying a stepped connecting portion of the backside isolation layer, or dummy regions which do not contact the end surfaces of the connection via structures.

Find Patent Forward Citations

Loading…