The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

Jan. 03, 2024
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Ching-Huang Lu, Fremont, CA (US);

Go Shikata, San Jose, CA (US);

Gangotree Chakma, Morgan Hill, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/408 (2006.01); G11C 11/4076 (2006.01); G11C 11/4096 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4085 (2013.01); G11C 11/4076 (2013.01); G11C 11/4096 (2013.01);
Abstract

A memory device includes a memory array and control logic, operatively coupled to the memory array, to perform operations including identifying a set of parameters related to the memory device, selecting, based on the set of parameters, a magnitude of a bias voltage to be applied to a global wordline during a read state transition of a block of the memory device from a transient state to a stable state, and causing the bias voltage to be applied to the global wordline.


Find Patent Forward Citations

Lu, Ching-Huang. (2026). Implementing global wordline bias voltages for read state transitions (U.S. Patent No. 12586629). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12586629

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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