The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

Jul. 23, 2024
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Huai-Yuan Tseng, San Ramon, CA (US);

Xiangyu Tang, San Jose, CA (US);

Eric N. Lee, San Jose, CA (US);

Haibo Li, Cupertino, CA (US);

Kishore Kumar Muchherla, San Jose, CA (US);

Akira Goda, Tokyo, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01);
Abstract

A memory device can include a memory array including memory cells arranged in one or more pages. The memory array can be coupled to control logic to receive a first request to write first data to a page of the one or more pages and program the first data to the page of the one or more pages at a first time responsive to receiving the first request. The control logic is further to receive a second request to write second data to the page of the one or more pages, read the page of the one or more pages, and program the second data to the page of the one or more pages at a second time responsive to receiving the second request. The control logic can also receive an erase request to erase the one or more pages after the second time.


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