The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2026

Filed:

Dec. 23, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Kshitij Arun Doshi, Tempe, AZ (US);

John J. Browne, Limerick, IE;

Christopher Macnamara, Limerick, IE;

Francesc Guim Bernat, Barcelona, ES;

Adrian Hoban, Cratloe, IE;

Thijs Metsch, Bruehl, DE;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/57 (2013.01); G06F 1/3228 (2019.01); G06F 1/3296 (2019.01); G06F 9/38 (2018.01); G06F 9/445 (2018.01); G06F 9/50 (2006.01); G06F 21/51 (2013.01); G06N 20/00 (2019.01); G06Q 10/087 (2023.01); H04L 9/40 (2022.01); H04L 41/5003 (2022.01); H04L 41/5009 (2022.01); H04L 41/5019 (2022.01); H04L 41/5025 (2022.01); H04L 41/5054 (2022.01); H04L 43/08 (2022.01); H04L 43/0823 (2022.01); H04L 47/70 (2022.01); H04L 47/72 (2022.01); H04L 47/83 (2022.01); H04L 67/1097 (2022.01); H04L 67/146 (2022.01); H04L 67/52 (2022.01);
U.S. Cl.
CPC ...
G06F 21/577 (2013.01); G06F 1/3228 (2013.01); G06F 1/3296 (2013.01); G06F 9/3875 (2013.01); G06F 9/44505 (2013.01); G06F 9/5027 (2013.01); G06F 21/51 (2013.01); G06N 20/00 (2019.01); G06Q 10/087 (2013.01); H04L 41/5003 (2013.01); H04L 41/5009 (2013.01); H04L 41/5019 (2013.01); H04L 41/5025 (2013.01); H04L 41/5054 (2013.01); H04L 43/08 (2013.01); H04L 43/0823 (2013.01); H04L 47/72 (2013.01); H04L 47/821 (2013.01); H04L 47/822 (2013.01); H04L 47/83 (2022.05); H04L 63/083 (2013.01); H04L 67/1097 (2013.01); H04L 67/146 (2013.01); H04L 67/52 (2022.05); G06F 2209/503 (2013.01); G06F 2221/033 (2013.01); G06F 2221/2135 (2013.01);
Abstract

Various systems and methods for implementing intent-driven power management are described herein. A system includes: a power monitoring unit to collect real-time telemetry of a processor on a compute node; and a power level controller to: receive a power intent for execution of an application on the compute node; configure a power level of the processor of the compute node based on the power intent, the processor to execute the application; set an initial execution priority of the application on the compute node based on the power intent; and modify the initial execution priority based on the power intent and the real-time telemetry of the compute node.


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