The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2026

Filed:

May. 06, 2023
Applicant:

Stats Chippac Pte. Ltd., Singapore, SG;

Inventors:

Heeyoun Kim, Incheon, KR;

Kyowang Koo, Incheon, KR;

Junghoon Kim, Gyeonggi-do, KR;

Youngsang Kim, Gyeonggi-do, KR;

Kyungmoon Kim, Gyeonggi-do, KR;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 21/4814 (2013.01);
Abstract

A semiconductor device and a method for making the same are provided. The semiconductor device includes: a substrate including a substrate top surface and a substrate bottom surface; an electronic component mounted on the substrate top surface; a bottom encapsulant disposed on the substrate top surface and encapsulating the electronic component; a top encapsulant disposed on the bottom encapsulant; an internal shielding layer disposed between the bottom encapsulant and the top encapsulant, wherein a projection of the internal shielding layer onto the substrate top surface overlaps with the electronic component, the internal shielding layer has an internal shielding layer lateral surface, and a portion of the internal shielding layer lateral surface is exposed from the bottom encapsulant and the top encapsulant; and an external shielding layer covering the bottom encapsulant and the top encapsulant and contacting with the exposed portion of the internal shielding layer lateral surface.


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