The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2026

Filed:

Jan. 18, 2023
Applicant:

Wuhan Xinxin Semiconductor Manufacturing Co., Ltd., Wuhan, CN;

Inventor:

Guoliang Ye, Wuhan, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/66 (2006.01); H01L 21/66 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 22/32 (2013.01); H01L 22/14 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 2224/03019 (2013.01); H01L 2224/03831 (2013.01); H01L 2224/0384 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05647 (2013.01);
Abstract

A manufacturing method for a semiconductor device includes: obtaining a pre-processed semiconductor structure, wherein the pre-processed semiconductor structure comprises a metal layer () having a first exposed surface (), and the first exposed surface () of the metal layer has a protrusion portion (); arranging a protective layer () on the first exposed surface () of the metal layer, wherein the protective layer () at least covers part of the metal layer () that excludes the protrusion portion (); removing the protrusion portion () to form on the metal layer () a second exposed surface () of the metal layer (); and forming a dielectric layer () on an area where the first exposed surface () is located, wherein the dielectric layer () completely covers the area where the first exposed surface () is located.


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