The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2026

Filed:

Jul. 17, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jun Ki Park, Suwon-si, KR;

Wan Don Kim, Suwon-si, KR;

Jeong Hyuk Yim, Suwon-si, KR;

Hyo Seok Choi, Suwon-si, KR;

Sung Hwan Kim, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 62/13 (2025.01); H10D 30/00 (2025.01); H10D 62/10 (2025.01); H10D 64/23 (2025.01);
U.S. Cl.
CPC ...
H10D 62/151 (2025.01); H10D 30/501 (2025.01); H10D 62/121 (2025.01); H10D 64/254 (2025.01); H10D 64/256 (2025.01);
Abstract

A semiconductor device includes a substrate including an upper surface and a lower surface that are opposite to each other in a first direction, an active pattern which is on the upper surface of the substrate and extends in a second direction, a gate electrode which is on the active pattern and extends in a third direction, a first source/drain pattern which is connected to the active pattern on the upper surface of the substrate, and includes a lower epitaxial region and an upper epitaxial region, the upper epitaxial region including an epitaxial recess, and the lower epitaxial region being inside the epitaxial recess, a first source/drain contact, which is connected to the first source/drain pattern and extends into the substrate, and a contact silicide layer, which is between the first source/drain contact and the first source/drain pattern and contacts the lower epitaxial region.


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