The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2026

Filed:

May. 25, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Tsung-Chieh Hsiao, Shetou Township, TW;

Hsiang-Ku Shen, Hsinchu City, TW;

Yuan-Yang Hsiao, Taipei, TW;

Wen-Chiung Tu, New Taipei City, TW;

Chen-Chiu Huang, Taichung City, TW;

Dian-Hau Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 1/00 (2025.01); H10D 1/68 (2025.01);
U.S. Cl.
CPC ...
H10D 1/042 (2025.01); H10D 1/714 (2025.01); H10D 1/043 (2025.01);
Abstract

A method of manufacturing a semiconductor device includes forming a first conductive layer over a first insulating layer and forming a first dielectric layer over the first conductive layer. A second conductive layer is formed over a first portion of the first dielectric layer. A second dielectric layer is formed over the second conductive layer. A third conductive layer is formed over the second dielectric layer and the second portion of the first dielectric layer. A third dielectric layer is formed over the third conductive layer. A first conductive contact is formed contacting the first conductive layer. A second conductive contact is formed contacting the third conductive layer. The second conductive layer is an electrically floating layer.


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