The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2026

Filed:

Dec. 14, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventor:

Yasir Mohsin Husain, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0038 (2013.01); G11C 13/0004 (2013.01); G11C 2213/71 (2013.01);
Abstract

Techniques for controlling current through memory cells are disclosed. In the illustrative embodiment, control circuitry may receive an instruction to perform an operation on a memory cell. The control circuitry determines properties of an electrical path that includes the memory cell, such as the capacitance and resistance of the electrical path. The control circuitry determines any additional current that should be applied to the memory cell beyond a base current. The control circuitry can adjust a bias current signal to increase the current through the memory cell when performing the operation based on the electrical characteristics of the path through the memory cell.


Find Patent Forward Citations

Husain, Yasir. (2026). Technologies for dynamic current mirror biasing for memory cells (U.S. Patent No. 12573453). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12573453

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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